Senior Hardware Engineer - Micro-Architect

March 19

🏢 In-office - Bay Area

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quadric.io

One Architecture. Every Algorithm.

11 - 50

Description

• Rare opportunity to get in on the ground floor of a revolutionary new processor architecture • Contribute to all stages of the processor design cycle • Own microarchitecture definition & RTL implementation • Own Power, Performance & Area (PPA) optimization • Contribute to timing closure through full product cycle • Expected outcomes in 12 months: own a major design block, improve PPA, develop understanding of architecture and SW interfaces, debug SW/HW stack, package design for customer releases

Requirements

• BS/MS or Ph.D. in Electrical or Computer Engineering with 5 years of CPU/GPU/ASIC front-end design • Proficiency in SystemC, SystemVerilog, or Verilog • Strong background in computer architecture • Knowledge of design techniques for low power digital design • Knowledge of VCS & Verilog/C Co-Sim • Experience in data-parallel hardware design • Experience in FPGA design is a plus • Experience in logic synthesis and performance modeling • Familiarity with automotive safety (ASIL) standards

Benefits

• Competitive salaries and meaningful equity • Politics-free community • Opportunity to build long term career relationships • Environment for personal and professional relationships

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